1. Field of the Invention
The present invention relates to an ATM (Asynchronous Transfer Mode) transmission system, which is advantageously applied to interface portions of subsystems of an ATM switch system, for example.
2. Description of the Background Art
An ATM switch system is a considerably large system including not only an ATM switch having a CPU (Central Processing Unit), but also line termination units, channel equipment and trunk circuits. Generally, the ATM switch, line termination units, channel equipment and trunk circuits are each arranged in the form of an individual subsystem included in a separate casing. The ATM switch plays the role of a higher-order system, while the line termination units, channel equipment and trunk circuits constitute a lower-order system. The higher-order and lower-order systems are interconnected by an interface line, a maintenance information line and a timing signal line.
The interface line is provided for transferring, between the higher-order and lower-order systems, multiplexed main, or user, information and control information. More specifically, it employs the in-channel control method, in which the control information is transferred over the same transmission line as the user or main information. The maintenance information line transfers maintenance information between the higher-order and lower-order systems. The maintenance information includes a reset signal and an LED (Liquid Crystal Display) display signal sent from the higher- to lower-order system, and an interrupt signal sent from the lower- to higher-order system. A timing signal line is provided for transferring timing signals such as a clock signal and a sync signal from the higher- to lower-order system.
The higher-order system can be connected to various types of lower-order systems. For example, it can be connected to lower-order systems with different interface rates such as 622 Mbps and 155 Mbps (bit per second), for example. In the ATM switch system, in practice, the line termination unit is installed correspondingly as the lines increase, in which case the interface rates of the lower-order systems can be changed dependently upon the fact that the line termination unit is changed to a new type or one including a different capacity of lines.
The conventional ATM switch system involves the following problems. First, it is necessary to install not only the interface line for conveying the user main information and control information, but also the maintenance information line and timing line between the higher-order and lower-order systems. If both systems are located at a distance from each other, these lines are long as well. Thus, it is highly desirable that the lines other than the interface line be omitted. In practice, a lot of lines are installed between the higher-order and lower-order systems, and this presents problems of increasing connection failures and of requiring increasing area and space. The problems involved in installing the lines become more serious when applying a redundant system configuration such as a duplex system.
Second, another problem arises in that the configuration of an interface circuit between the higher-order and lower-order systems becomes complicated when the lower-order systems have different interface rates. For example, when one of the lower-order systems selects 155 Mbps as its interface rate, it is impossible to send to the one system the user main information at the interface rate of 622 Mbps. On the contrary, if it selects 622 Mbps as its interface rate, it is necessary to quadplex the 155 Mbps user main information, and dequadplex them at the receiving side.
Furthermore, although the conventional ATM switch system employs the in-channel method as mentioned above, the receiving side relinquishes the use of a processor for the user main information while receiving the maintenance information, thereby consuming time ineffectively.